Greetings

I'm a 4th-year Ph.D. candidate in Computer Science at the University of Toronto, working under the supervision of Prof. Khai Truong.

My research centers human-AI interaction, with an emphasis on accessibility and creativity support, particularly in enhancing "music accessibility" for d/Deaf and hard-of-hearing individuals. One of my main projects involves song signing to support culturally responsive content creation and encourage collaboration between d/Deaf and non-d/Deaf artists. Another aspect of my work focuses on enhancing people's well-being. I am engaged in projects that support individuals with dementia in their out-of-home experiences and encourage mindful eating behaviours among children.

I completed my B.Sci in Computer Science and Engineering at Ewha Womans University, where I was advised by Prof. Uran Oh (Human-Computer Interaction Lab) and Prof. Hyokyung Bahn (Distributed Computing and Operating System Lab). Additionally, I worked as a research intern at the Samsung AI Centre Toronto under the guidance of Dr. Iqbal Mohomed, and at NAVER AI (HCI group) with Dr. Young-Ho Kim.
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IIBC 2020 : Real-Time Power-Saving Scheduling Based on Genetic Algorithms in Multi-core Hybrid Memory Environments

 [1] S. Yoo, Y. Jo, K. Cho, and H. Bahn, “Real-Time Power-Saving Scheduling Based on Genetic Algorithms in Multi-core Hybrid Memory Environments,” The Journal of The Institute of Internet, Broadcasting and Communication (IIBC) , vol. 20, no. 1, pp. 135–140, Feb. 2020.

[pdf] [journal]


초록

영어
Recently, due to the rapid diffusion of intelligent systems and IoT technologies, power saving techniques in real-time embedded systems has become important. In this paper, we propose P-GA (Parallel Genetic Algorithm), a scheduling algorithm aims at reducing the power consumption of real-time systems in multi-core hybrid memory environments. P-GA improves the Proportional-Fairness (PF) algorithm devised for multi-core environments by combining the dynamic voltage/frequency scaling of the processor with the nonvolatile memory technologies. Specifically, P-GA applies genetic algorithms for optimizing the voltage and frequency modes of processors and the memory types, thereby minimizing the power consumptions of the task set. Simulation experiments show that the power consumption of P-GA is reduced by 2.85 times compared to the conventional schemes.

한국어
최근 사물인터넷, 지능형 시스템 등의 활성화로 실시간 임베디드 시스템의 전력 절감 기술이 중요해지고 있다. 본 논문은 멀티코어 이기종메모리 환경에서 실시간 시스템의 전력 소모량을 절감하는 P-GA (parallel genetic algorithm) 스케줄링 알고리즘을 제안한다. P-GA는 멀티코어를 위한 PF (proportional fairness) 알고리즘에 기반한 프로세서의 전압 및 주파수 동적 조절 기법에 차세대 비휘발성메모리 기술을 결합하여 시스템의 전력 소모를 더욱 줄인 다. 특히, 유전 알고리즘을 사용하여 태스크별 수행 프로세서의 전압 및 주파수 모드와 메모리의 종류를 최적화하여 태스 크 집합의 전력 소모량을 최소화한다. 시뮬레이션 실험을 통해 P-GA가 기존 방식 대비 최대 2.85배의 전력 소모량을 감소할 수 있음을 보인다.

목차

요약
Abstract
Ⅰ. 서론
Ⅱ. 본론
1. 프로세서의 전압 및 주파수 조절 방법
2. 비휘발성 차세대 메모리를 이용하는 방법
3. 유전 알고리즘을 이용하는 방법
4. 시스템 모델
Ⅲ. 성능 평가
Ⅳ. 결론
References

키워드

DVFS Genetic Algorithm Hybrid Memory Multi core Real Time Scheduling.

저자

  • 류수현 [ Suhyeon Yoo | 비회원, 이화여자대학교 컴퓨터공학과 ]
  • 조예원 [ Yewon Jo | 비회원, 이화여자대학교 컴퓨터공학과 ]
  • 조경운 [ Kyung-Woon Cho | 준회원, 이화여자대학교 임베디드소프트웨어연구센터 ]
  • 반효경 [ Hyokyung Bahn | 정회원, 이화여자대학교 컴퓨터공학과 ] 교신저자





  • 간행물명
    한국인터넷방송통신학회 논문지 [The Journal of the Institute of Internet, Broadcasting and Communication]
  • 간기
    격월간
  • pISSN
    2289-0238
  • eISSN
    2289-0246
  • 수록기간
    2001~2020
  • 등재여부
    KCI 등재
  • 십진분류
    KDC 566.57 DDC 629
라벨:

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